At a high level, the metric space for an ASIC design consists of:
- Performance (Timing)
- Area
- Power
- Effort
- Schedule
- Unit cost
- Supercomputer applications : Performance is everything. The nature of the business (low volume, high margins, controlled device environment) is such that the other metrics don't really matter (within (relaxed) limits).
- Desktop Processors : High performance and unit cost matter. Schedule and effort are very high (think of the teams to spend a year or two doing nothing else but designing the next-generation desktop processor) but that's ok because, with a low unit cost and high volumes, the business will still generate a profit.
- Memories : Area and unit cost matter. The objective is to create the densest memories possible such that you can hit a performance standard at the least unit cost possible.
- Short product cycles
- High volumes
- Cost-driven business
- Power-sensitive
- High performance
- Smaller/slimmer mobile devices
- Increasing functionality (multiple interfaces(Wi-Fi, Bluetooth, SD), on-device memory ..)
- Performance : high performance (increasing functionality)
- Area : ultra-low area (smaller die, smaller footprint)
- Power : ultra-low power (very power-sensitive)
- Effort : Low effort (small teams, fast turnaround time)
- Schedule: Very short (shrinking product cycles, market windows)
- Unit Cost : Very low (high volume, low margins)
Performance-driven businesses (supercomputers, processors) usually receive the largest mindshare but it is mobile/wireless design that has been (and will be) quietly advancing ASIC design on all fronts.
Tags : ASIC, VLSI
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